
General:

* Move external guests out to other repositories
* Possibly move all guests to other repositories, or at least other root directories
* We should have the notion of a release / release branch

H2 infrastructure:
* Update documentation. Switch to doxygen or other in-file documentation scheme?
* Go back over tests, get to ~100% unit test coverage
* optimize translation
* Power Collapse
* Island mode
* Test 36 bit PA bits more
* Kernel trace, or just continue to use ETM?
* Continue to eliminate global data where possible
* Refactor vector context save/restore (?)  Maybe move to new module?
* V6x PMU work (now w/ STID)
* Low: split bulk context storage from kernel info to split between DDR & TCM/L2locked
* optimize, get code size down.  Code size + data size < 24KB.
* Optimize trap: minimal context save/restore
* Optimize walker
* Be able to compile out shints
* Optimize context layout: context save and switch in-sequence filling cache lines
* Optimization idea: remove continuation as a funcptr, there are only a few types of continuations.
* Remove ability to utilize L1 interrupts generally? 
	Lots of test changes, requires devsim to do int tests.
	But, not much need to accept L1 interrupts.  Will simplify interrupt paths.
	Can map vic and then do tests from booter
* Flatten config / hwconfig for code size (& perf), also yields more args for subcalls
* Once simulators update, add intpool test_h2 to testlist

VMM tasks:

* Update VMM docs
* Page tables w/ 36-bit+ PA, possibly multilevel?
* Secure Debug

DONE : * Switch to LLVM, get LLVM guys to make global reg work better
DONE : * (I think) Make sure all pa values are 36-bit clean
DONE : * (I think) Make sure extra PA bits are used as appropriate (e.g. futex; everywhere we use pa_t)
DONE : * Save/restore framelimit,framekey
DONE : * Save/restore pktcount
DONE : * Try and optimize context storage? -- changed to 16 per-cpu interrupts
DONE : Better page table format, better storage efficiency but faster than linear.
DONE : * Refactor translation
DONE : * Even better interrupt mechanism -- interrupts delivered to pool of waiting threads

